The basic concept of the Tellegen’s theorem being identical in d.c. or a.c. systems, for the application in a.c. systems, it can be stated as follows:
In any linear, non-linear, passive, active time variant network, exited by alternating sources, the summation of instantaneous or complex power of the source is zero.
For the network exited by sinusoidal sources, if the number of branch be “b”,
Where vb and i_b represent the instantaneous voltage and current of source of each branch.
When considering the complex power, if Vb and Ib be the voltage and current of each branch, as per this theorem,
Where Ib* is a complex conjugate of Ib.
Proof of Tellegen’s Theorem
With reference to the network shown in figure 1, let the node voltage be V1, V2 and V3 at nodes 1, 2 and 3 respectively. The current directions are shown arbitrarily.
The summation of instantaneous power in the network is given by
[where, VC1, VC2, VL, VR1 etc. indicate the respective voltage across the elements C1, C2, L, R1 etc.]
Application of KCL at node (1) reveals that i1 + i2 + i6 = 0, at node (2), i3 + i4 – i2 = 0 and at node (3), i5 – i4 – i6 = 0.
Hence the theorem is proved.